Freescale Semiconductor
Addendum
Document Number: QFN_Addendum
Rev. 0, 07/2014
Addendum for New QFN
Package Migration
This addendum provides the changes to the 98A case outline numbers for products covered in this book.
Case outlines were changed because of the migration from gold wire to copper wire in some packages. See
the table below for the old (gold wire) package versus the new (copper wire) package.
To view the new drawing, go to Freescale.com and search on the new 98A package number for your
device.
For more information about QFN package use, see EB806:
Electrical Connection Recommendations for
the Exposed Pad on QFN and DFN Packages.
© Freescale Semiconductor, Inc., 2014. All rights reserved.
Part Number
MC68HC908JW32
MC9S08AC16
MC9S908AC60
MC9S08AC128
MC9S08AW60
MC9S08GB60A
MC9S08GT16A
MC9S08JM16
MC9S08JM60
MC9S08LL16
MC9S08QE128
MC9S08QE32
MC9S08RG60
MCF51CN128
MC9RS08LA8
MC9S08GT16A
MC9S908QE32
MC9S908QE8
MC9S08JS16
MC9S08QB8
MC9S08QG8
MC9S08SH8
MC9RS08KB12
MC9S08QG8
MC9RS08KB12
MC9S08QG8
MC9RS08KA2
6 DFN
Package Description
48 QFN
Original (gold wire)
Current (copper wire)
package document number package document number
98ARH99048A
98ASA00466D
48 QFN
32 QFN
32 QFN
32 QFN
24 QFN
98ARL10606D
98ARH99035A
98ARE10566D
98ASA00071D
98ARL10608D
98ASA00466D
98ASA00473D
98ASA00473D
98ASA00736D
98ASA00734D
24 QFN
24 QFN
24 QFN
16 QFN
8 DFN
98ARL10605D
98ARE10714D
98ASA00087D
98ARE10614D
98ARL10557D
98ASA00474D
98ASA00474D
98ASA00602D
98ASA00671D
98ASA00672D
98ARL10602D
98ASA00735D
Addendum for New QFN Package Migration, Rev. 0
2
Freescale Semiconductor
MC9S08GT16A
MC9S08GT8A
Data Sheet
HCS08
Microcontrollers
MC9S08GT16A
Rev. 1
7/2006
freescale.com
MC9S08GT16A/GT8A Features
8-Bit HCS08 Central Processor Unit (CPU)
•
•
•
40-MHz HCS08 CPU
HC08 instruction set with added BGND instruction
Support for up to 32 interrupt/reset sources
•
•
•
Software selectable pullups on ports when used as
input
Internal pullup on RESET and IRQ pin to reduce
customer system cost
Up to 38 general-purpose input/output (I/O) pins,
plus one output-only pin, depending on package
selection
Memory Options
•
•
FLASH read/program/erase down to 1.8 V
Up to 16K FLASH; up to 2K RAM
Development Support
•
•
Background debugging system
Breakpoint capability to allow single breakpoint
setting during in-circuit debugging (plus two more
breakpoints in on-chip debug module)
On-chip, in-circuit emulation (ICE) debug module
with real-time bus capture. On-chip ICE debug
module containing two comparators and nine trigger
modes. Eight deep FIFO for storing change-of-flow
addresses and event-only data.
Single-wire background debug interface
Power-Saving Modes
•
•
•
Three very low power stop modes
Reduced power wait mode
Very low power real time interrupt for use in run,
wait, and stop
•
Clock Source Options
•
Clock sources to internal hardware frequency
locked-loop (FLL): internal, external, crystal, or
resonator
Internal clock with
±0.2%
trimming resolution and
±0.5%
deviation across voltage or across
temperature
•
Package Options
•
•
•
•
48-pin QFN
44-pin QFP
42-pin PSDIP
32-pin QFN
•
System Protection
•
•
•
•
•
Optional watchdog computer operating properly
(COP) reset
Low-voltage detection with reset or interrupt
Illegal opcode detection with reset
Illegal address detection with reset
FLASH block protect and security
Peripherals
•
•
•
•
•
•
ATD — 8-channel, 10-bit analog-to-digital
converter
SCI — Two serial communications interface
modules
SPI — Serial peripheral interface module
IIC — Inter-integrated circuit bus module
Timer —One 3-channel timer PWM module (TPM)
plus one 2-channel TPM
KBI — 8-pin keyboard interrupt module
Input/Output
•
8 high-current pins (20 mA each)
